Martha Kim


450 S.W. Mudd
Mail Code 0401

Tel(212) 853-8435
Fax(212) 666-0140

Modern computer systems have a complex structure consisting of layer upon layer of interwoven hardware and software, each designed at different times and different locations by hundreds of engineers. These independently designed layers often interact in unexpected or inefficient ways. Martha Kim develops tools and designs that help computer systems operate efficiently and intuitively. Her projects attack inefficiencies and exposed hidden behaviors. 

Research Interests

Computer architecture, parallel programming, compilers, low-power computing.

Of particular interest to Kim is the interface between the hardware and software.  She has designed a database accelerator around that workload’s typical data structures resulting in more energy efficient queries.  She has exposed how a piece of parallel software exploits parallel hardware processing resources enabling the programmer to optimize an application to better use available hardware resources and resulting in faster and more efficient code. Her current research seeks to improve the versatility and usability of specialized hardware accelerators that abound in today’s chips.

Kim received a AB in computer science from Harvard University in 2002 and a PhD in computer science and engineering from the University of Washington in 2008.   She is a member of the IEEE and ACM.


  • Graduate research assistant, University of Washington, 2003-2008 [Eliminate if not appropriate.]


  • Associate professor of computer science, Columbia University, 2015–
  • Assistant professor of computer science, Columbia University, 2009–2014


  • IEEE
  • Association of Computing Machinery


  • Borg Early Career Award, Computing Research Association - Women, 2016
  • Faculty Research Award, Google, 2016
  • Top Picks in Computer Architecture, IEEE Micro, 2013, 2014, 2015
  • CAREER Award, National Science Foundation, 2013


  • A. Lottarini, S. A. Edwards, K. A. Ross, M. A. Kim. Network Synthesis for Database Processing Units. To appear in Design Automation Conference (DAC), June 2017. 
  • R. Townsend, M. A. Kim, S. A. Edwards. From Functional Programs to Pipelined Dataflow Circuits. In International Conference on Compiler Construction (CC), pages 76 – 86, February 2017. 
  • M. Kambadur, M. A. Kim. NRG-Loops: Conditionally Adjusting Applications to Conserve Power and Energy. In International Symposium on Code Generation and Optimization (CGO), pages 206 – 215, March 2016. 
  • K. Zhai, R. Townsend, L. Lairmore, M. A. Kim, S. A. Edwards. Hardware Synthesis from a Recursive Functional Language. In International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), pages 83 – 93, October 2015. 
  • M. Kambadur, S. Hong, J. Cabral, H. Patil, C. Luk, S. Sajid, M. A. Kim. Fast Computational GPU Design with GT-Pin. In International Symposium on Workload Characterization (IISWC), pages 76 – 86, October 2015.  
  • B. Cao, K. A. Ross, M. A. Kim, S. A. Edwards. Implementing Latency-Insensitive Dataflow Blocks. In ACM-IEEE International Conference on Formal Methods and Models for System Design (MEM- OCODE), pages 179 – 187, September 2015. 
  • M. Kambadur, M. A. Kim. An Experimental Survey of Energy Management Across the Stack. In International Conference on Object-Oriented Programming, Systems, Languages and Applications (OOP- SLA), pages 329 – 344, October 2014.
  • L. Wu, A. Lottarini, T. Paine, M. A. Kim, K. A. Ross. Q100: The Architecture and Design of a Database Processing Unit. In Architectural Support for Programming Languages and Operating Systems (ASPLOS), pages 255 – 268, March 2014.  Top Picks in Computer Architecture Selection. 
  • M. Kambadur, K. Tang, M. A. Kim. ParaShares: Finding the Important Basic Blocks in Multithreaded Programs. In International European Conference on Parallel Processing (Euro-Par), pages 75 – 86, February 2014. 
  • L. Wu, R. J. Barker, M. A. Kim, K. A. Ross. Navigating Big Data with High-Throughput, Energy- Efficient Data Partitioning. In International Symposium on Computer Architecture (ISCA), pages 249 – 260, June 2013. Top Picks in Computer Architecture Selection. 
  • M. Kambadur, K. Tang, M. A. Kim. Harmony: Collection and Analysis of Parallel Block Vectors. In International Symposium on Computer Architecture (ISCA), pages 452 – 463, June 2012. Top Picks in Computer Architecture Selection. 
  • M. Kambadur, T. Moseley, R. Hank, M. A. Kim. Measuring Interference Between Live Datacenter Applications. In International Conference on Supercomputing (SC), pages 51 – 63, May 2012.